Summer Bootcamp - DTI refactoring and DTI VIP Integration on SATB PCIe Bridge regression flow - #236994

Job Description and Requirements

Executive summary:
Synopsys is a leading company in digital IP and EDA tools. Connecting this two fields Synopsys aim to provide his clients and collaborators with better and accurate building blocks (IPs) and tools to design, develop and verify better Systems-on-Chip (Soc) without errors, secure, faster, with less area and lower power consumption. Using Synopsys VCS simulation engine, regression control environment (RCE) and URG reporting capabilities, we test and validate our IP capabilities and show results that we achieve to our clients. In synergy with these tools, Verification IP (VIP) provides verification engineers access to the industry's latest protocols, interfaces and memories required to verify their SoC. Also, they help clients accelerate testbench development, closure, and ensure end-product quality verifying the correctness and completeness of data with integrated automatic protocol checks, built-in verification plans and coverage and the latest protocol specifications. Considering the mentioned aspects, in this internship we intend to improve our testbench with the latest Distributed Translation Interface (DTI) VIP capabilities and refactoring existing verification DTI data structures and methods. This summer job also intends to provide interns with industry experience, get contact with industry leading company practices and tools, exposure to new methodologies and sharp already learned technical and soft skills.
In this project the intern will help the PCIe Bridge verification team fine tune DTI related testbench side, integrate DTI VIP, and include DTI VIP Coverage. Having that will give our team a unified and standardized solution which improves the quality, reliability and the range of covered results delivered to our important clients.

Main skills to develop:
Technical skills:

• Evaluates and exercises various aspects of the development flow. May include such items as Verilog, System-Verilog development, VMM, UVM, scripting, functional simulation, constraint development and functional verification.
• Participate in evaluation and troubleshooting of systems and workflows.
• Good problem-solving skills.
• Programming skills in one or more languages such as Python, System-Verilog or verification methodologies VMM or UVM.
• Exposure to Unix, Perl or scripting.
• Identify design problems, possible corrective actions and/or inconsistencies on documented functionality.
• Work on state-of-the-art products and use cutting edge technologies.

Non-technical skills:

• Exposure to team collaboration software that help teams organize, discuss, and complete shared work.
• Improve/practice communication skills in English.
• Explore investigation, analysis, and problem-solving skills.
• Sharpen the desire to learn and explore new technologies.
• Contact with stable and supportive work environment where execution excellence, passion and integrity are valued.

Goals:
This summer job exposes interns to the vast Synopsys EDA portfolio, verification IP and daily work/collaboration tools and methodologies interacting with the existing SATB verification flow and state of art coverage tools. Furthermore, we expect to see improvements in the following areas: DTI related testbench side, DTI coverage results and checks, increase accuracy and reliability by having a standardized VIP solution. In summary:

• DTI VIP integration in verification testbench.
• Refactoring and adaptation of existing DTI testbench related code.
• DTI VIP coverage integration in the regression flow.
• Debug and root cause results and undesirable behaviors.
• Enhance, produce and present needed documentation.

Project planning/tasks:

• Initial required training (Unix, System-Verilog, Testbench environment).
• DTI VIP first steps through documentation analysis, coverage references and experiments.
• DTI VIP integration on SATB.
• Refactoring and adapting existing DTI related code.
• DTI VIP coverage integration in the regression flow.
• Debug and improve coverage and regression results.
• Present the results and write supporting report/presentation.